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>> Table: x21IfTable - (.1.3.6.1.4.1.272.4.10.1.1)
Description: The x21IfTable contains information relating to the interfaces found on the system. Each entry corresponds to a connected X21 interface. Entries can only be added or deleted by the system. Creating entries: Entries are created by the system only when a new X21 module is installed. Deleting entries: Entries are removed by the system after the appropriate X21 module is removed.
x21IfTable
OID | Name | Type | Access
.1 | Index | INTEGER | R
.2 | L1State | ENUM | R
.3 | L1Mode | ENUM | RW
.4 | IfLeads | ENUM | RW
.5 | Speed | ENUM | RW
.6 | L2Mode | ENUM | RW
.7 | SpeedReal | Counter | R
.8 | RxPackets | Counter | R
.9 | RxOctets | Counter | R
.10 | TxPackets | Counter | R
.11 | TxOctets | Counter | R
.12 | RxResets | Counter | R
.13 | RxAborts | Counter | R
.14 | RxOverruns | Counter | R
.15 | RxCRCErrors | Counter | R
.16 | RxGiantFrames | Counter | R
.17 | TxResets | Counter | R
.18 | TxAborts | Counter | R
.19 | TxUnderruns | Counter | R
.20 | TxGiantFrames | Counter | R
.21 | IfReSyncs | Counter | R
.22 | Bundle | INTEGER | RW
Index
Unique index of the X21 interface.
L1State
The X21 physical layer state dn(1) physical layer is inactive; up(2) physical layer is active; Enumerations: dn (1) up (2)
L1Mode
The physical layer (layer 1) mode. When configured as DCE(2) the X21 interface provides the clock. Enumerations: dte (1) dce (2)
IfLeads
The value of IfLeads has influence on the state of the physical layer (L1State). When configured as IfLeads=enabled(1), the state of the physical layer depends on the signals of the X.21 interface pins `Indication' and `Control'. When configured as IfLeads=disabled(2), the state of the physical layer stays always up. Enumerations: enabled (1) disabled (2)
Speed
The X21 interface speed in bits per second. The range can be configured between 2Mbits and 2400 Bits per second. Enumerations: s2048k (1) s1024k (2) s512k (3) s256k (4) s128k (5) s64000 (6) s38400 (7) s19200 (8) s14400 (9) s9600 (10) s2400 (11)
L2Mode
The layer 2 mode. This value has influence on the HDLC address field (first byte of a HDCL frame). When configured as DTE(1) the address in a command frame is 0x01, when configured as DCE(2) it is 0x03. For response frames it is vice versa. When configured as AUTO(3), layer 2 is set to the same mode like L1Mode is set. Enumerations: dte (1) dce (2) auto (3)
SpeedReal
The measured X21 interface speed in bits per second.
RxPackets
Count of received valid Frames.
RxOctets
Count of received bytes.
TxPackets
Count of transmitted valid Frames.
TxOctets
Count of transmitted bytes.
RxResets
Count of receiver resets. Under rare circumstances it might be necessary to reset the receiver to work properly.
RxAborts
Count of receiver aborts. The sender of a frame can indicate a frame as aborted with a special Abort sequence.
RxOverruns
Count of receiver overruns. If the X21 card is unable to grant sufficiently soon/often the bus, the 32-character RxFIFO may fill up. This leads to loss of data.
RxCRCErrors
Count of corrupted frames. Errors due to interference on the X21 cable.
RxGiantFrames
Count of received frames with illegal framesize. This can occur if a frame delimiter is destroyed.
TxResets
Count of transmitter resets. Under rare circumstances it might be necessary to reset the transmitter to work properly.
TxAborts
Count of transmitter aborts. While sending a frame it might be necessary to indicate this frame as aborted. In this case the receiver regards this frame as illegal.
TxUnderruns
Count of transmitter underruns. The serial data for the X21 card is supplied too slowly.
TxGiantFrames
Count of transmitted frames with illegal framesize. This can occur if an upper module creates packets with more than the maximum allowed packet size.
IfReSyncs
Count of interface resynchronization. Under rare circumstances it might be necessary to resynchronize the physical interface to work properly.
Bundle
Index of the bundle to aggregate multiple Channels to one interface. Range: 0 to 255

MIB Reference to Software Version 10.1.21 generated on 2016/12/23. Provided by webmaster@bintec-elmeg.com Copyright ©2016 by bintec elmeg GmbH